Method of manufacturing a ferroelectric device

ABSTRACT

The invention relates to a ferroelectric device ( 10 ) with a body ( 11 ) comprising a substrate ( 1 ) and a ferroelectric layer ( 2 ) provided with a connection conductor ( 3 ) on a side facing away from the substrate ( 1 ), which ferroelectric layer contains an oxygen-free ferroelectric material ( 2 ) and is used to form an active electrical element ( 4 ), in particular a memory element ( 4 ). Such a device forms an attractive non-volatile memory device. In accordance with the invention, a conductive layer ( 5 ) is present between the substrate ( 1 ) and the ferroelectric layer ( 2 ), which conductive layer forms a further connection conductor ( 5 ) of the ferroelectric layer ( 2 ), and the active electrical element ( 4 ) is obtained as a result of the fact that the ferroelectric layer ( 2 ) forms a Schottky junction with at least one of the connection conductors ( 3, 5 ). In practice it has been found that such a device ( 10 ) comprises a well-performing memory element ( 4 ) that can be readily formed on a, preferably monocrystalline, silicon substrate ( 1 ). Preferably, the device ( 10 ) further comprises a field effect transistor ( 6 ), and the element ( 4 ) is preferably situated above the source or drain region ( 7 ) of the transistor ( 6 ). The active element also may function as a diode.

The invention relates to a ferroelectric device with a body comprising asubstrate and a ferroelectric layer provided with a connection conductoron a side facing away from the substrate, which ferroelectric layercontains an oxygen-free ferroelectric material and is used to form anactive electrical element. In case the active electrical element is amemory element, such a device constitutes a non-volatile memory and assuch forms an attractive alternative to a non-volatile semiconductormemory element, partly due to the fact that it can be read very manytimes. The presence of an oxygen-free ferroelectric material in thedielectric layer has the important advantage that a reaction with theadjoining semiconductor material, causing the formation of anelectrically insulating oxide that might adversely affect the electricalproperties of the device, is precluded. The invention also relates to amethod of manufacturing such a device.

A device of a type mentioned in the opening paragraph is known fromUnited States patent specification U.S. Pat. No. 5,373,176, published on13 Dec. 1994. In said specification a description is given of an MFS(=Metal Ferroelectric Semiconductor) structure comprising aferroelectric layer which is provided on a CdTe semiconductor substrateand on which a gate electrode is present, which MFS structure is used toform a memory element comprising a part of the substrate and two dopedregions present in the substrate. The ferroelectric layer contains anoxygen-free ferroelectric material in the form of a chalcogenidecomprising ZnCdTe. The advantage of such a device is that, by virtue ofepitaxial growth of the ferroelectric layer on the substrate, ahigh-quality interface between the (CdTe) substrate and the (ZnCdTe)ferroelectric layer can be achieved, which is necessary to obtain aproperly functioning device.

In this application, chalcogenide is to be taken to mean a material thatcomprises a compound of at least an element, preferably a metal, and atleast one of the elements S, Se and Te. Of course this compound alsoincludes in particular mixed crystals having for example the compositionA1_(x)A2_(1-x)B, where A1 comprises one or more of the elements Zn, Cd,Hg, Al, Ga, In or Tl, A2 comprises one or more of the elements Si, Ge,Sn and Pb, and B comprises one or ore of the elements S, Se, Te, thevalue of x ranging between 0 and 1. Furthermore, it is to be noted thatin this application, oxygen free is to be taken to mean that there is nointentional addition of oxygen into the ferroelectric material nor anyintentional doping thereof with oxygen. Thus, the ferroelectric materialonly does contain oxygen insofar as unavoidable when using high puritymaterials and processing.

A drawback of the known device resides in that it requires theferroelectric layer to be grown directly on the semiconductor substrate,which is difficult, in particular, if the substrate contains Si.

Therefore, it is an object of the present invention to provide a devicewhich can be formed also on other substrates, such as a siliconsubstrate. In addition, the device should be easy to manufacture.

To achieve this, in accordance with the invention, a device of the typementioned in the opening paragraph is characterized in that a conductivelayer is situated between the substrate and the ferroelectric layer,which conductive layer forms a further connection conductor of theferroelectric layer, and the active electrical element is formed as aresult of the fact that the ferroelectric layer forms a Schottkyjunction with at least one of the connection conductors. The inventionis based first of all on the recognition that epitaxial growth is notnecessary to obtain a memory effect in a ferroelectric material. Also ifthe material is polycrystalline, it can be used if the crystals of thepolycrystalline layer are at least predominantly ordered. The materialsin question exhibit this behavior, the crystals most frequently beingoriented in the direction of fastest growth. In the case of thematerials considered here, this direction generally corresponds to adirection which extends substantially perpendicularly to the thicknessdirection of a layer grown. As a result, also a non-monocrystallinelayer, which is generally true for a conductive or insulating layer, maybe situated between a monocrystalline substrate and the ferroelectriclayer. Even the substrate does not have to be monocrystalline. Theinvention is further based on the recognition that by choosing aconductive layer as an intermediate layer, if this conductive layerfurther serves as a connection conductor, still a memory element isformed by means of the ferroelectric layer on the proviso that at leastone of the junctions of the ferroelectric layer with the connectionconductor and the further connection conductor is embodied so as to be aSchottky junction. As a result, the ferroelectric layer does not have tobe provided on the semiconductor substrate, which also enables a deviceof the desired properties to be formed using a silicon substrate. Chargecarriers may tunnel through the Schottky barrier associated with theSchottky junction, and the conductivity of the element may be influencedby changing the polarization, as a result of which the size of thedepletion region is changed. The memory element can be switched verymany times between two states.

An additional advantage of a device in accordance with the inventionresides in that the manufacture thereof is very compatible with themethod customarily used to manufacture silicon devices. The finalprocess step of this method is preferably a so-termed annealing step ina hydrogen atmosphere. By virtue of the fact that the materials used,for example chalcogenide materials as defined hereinabove, do notcontain oxygen, such a process step is permissible. If the ferroelectriclayer contained oxygen, then hydrogen would readily influence thestoichiometry of the ferroelectric layer and hence the properties ofsaid layer. By virtue of the fact that the dielectric layer contains anoxygen-free ferroelectric material, a reaction between the ferroelectricmaterial and one of the adjoining metal layers, causing the formation ofan electrically insulating oxide that might adversely affect theelectrical properties of the device, is precluded. Finally, an importantadvantage resides in that said ferroelectric materials generally can bemanufactured at a comparatively low temperature. This too facilitatesintegration within the silicon technology.

In a preferred embodiment of a device in accordance with the invention,the active electrical element is a memory element. Preferably, in adevice in accordance with the invention, the body comprises—inaccordance with the above explanation—a semiconductor body, and thesubstrate comprises a, preferably monocrystalline, semiconductorsubstrate. A substrate which is customary per se, such as a(100)-oriented monocrystalline silicon substrate is very suitable.

In a particularly favorable modification, a device in accordance withthe invention also comprises a field effect transistor with a sourceregion, a drain region and a gate electrode, and the further connectionconductor is situated on the source region or the drain region of thefield effect transistor and also serves as a connection conductor of thesource region or the drain region. Such a transistor can very suitablybe used as a selection means if the semiconductor device comprises alarge number of memory elements, which is often desirable in practice.In addition, such a transistor can be very readily manufactured using,in particular, the technology that is based on the use of silicon as thesemiconductor substrate. By virtue of the fact that the furtherconnection conductor also serves as (one of the) connection conductor(s)of the transistor, the manufacture is comparatively simple. In addition,the device in accordance with the invention can be very compact if thesource region or the drain region and the memory element are situatedone above the other, viewed in projection. This is an important furtheradvantage. For example, this enables the memory element to beincorporated in a so-termed contact metal plug which is customary inmany (C)MOS (=(Complementary) Metal Oxide Semiconductor) processes.These are relatively thick and frequently contain a metal such astungsten.

In a favorable modification, the Schottky junction is formed between thefurther connection conductor and the ferroelectric layer and forms anohmic contact with the source region or the drain region of the fieldeffect transistor, while the connection conductor forms an ohmic contactwith the ferroelectric layer. As a result, aluminum can be used as theconnection conductor, which is quite customary in the silicontechnology. As this connection conductor is situated on the outside ofthe device, and hence is provided in a late stage of the manufacturingprocess, this connection conductor is not adversely affected by thecomparatively high temperatures that are frequently required in thebeginning of the manufacturing process. Platinum, which is suitable toform a Schottky junction with the ferroelectric layer, can also suitablybe used to form an ohmic contact with an n+-doped source region or drainregion of silicon.

Materials that can suitably be used as the material for the connectionconductor forming a Schottky junction with the ferroelectric layer arePt or Au. Ag or Al can very suitably be used as the material of theconnection conductor forming an ohmic contact with the ferroelectriclayer.

Favorable results are achieved by using a ferroelectric layer comprisingas the oxygen-free ferroelectric material a chalcogenide such asZn_(x)Cd_(1-x)S, preferably Zn_(x)Cd_(1-x)S having a Zn content of xranging between 0.3 and 0.5. Very usable results have also been obtainedby using Cu₂S as the oxygen-free ferroelectric material. An importantadditional advantage of such a material is that it does not containtoxic constituents. Thus, in such a case there is no or substantially noburden on the environment when the device is disposed of for exampleafter its useful life. Another consequence of this is that in particularthe safety of the manufacturing environment wherein a device inaccordance with the invention is manufactured is improved. Startingmaterials such as Cd are banned more and more from the manufacturingenvironment. In the case of Cu₂S use can advantageously be made of Cuand W for the connection conductors. These too are materials that areincreasingly permitted and that are applied in the (silicon)semiconductor technology.

Preferably the doping concentration of the oxygen-free ferroelectricmaterial is chosen to be so high that an ohmic contact between theconnection conductor or the further connection conductor and theferroelectric layer is formed, and that, during operation, the electricfield in the ferroelectric layer in the conducting state is sufficientlyhigh to switch off the memory element.

Preferably, a device in accordance with the invention comprises a matrixof N×M memory elements, where N and M are natural numbers and eachmemory element is connected on both sides to an electric connection. Amemory having a large capacity may thus have been formed. Preferably,each memory element is coupled to an associated field effect transistorwith a source region, a drain region and a gate electrode, and thedevice is provided with N first conductor tracks and M second conductortracks and with a ground connection, and each memory element isconnected via the connection conductor to one of the N first conductortracks and via the further connection conductor to the source region ordrain region of the field effect transistor whose drain region or sourceregion is connected to the ground connection, and the gate electrode ofthe field effect transistor is connected to one of the M secondconductor tracks. This construction enables the memory elements to beread while the number of necessary conductor tracks is limited.

It is to be noted that a device according to the invention may also forma diode like device with important advantages. The advantages of thesenovel diodes compared with existing diodes are: a low operating voltagefor the same forward-reverse current ratio, a high current density inthe forward direction and thus a low area for the same forward currentand the fact that they do not require a single-crystal substrate. In oneembodiment, the device is used as a diode outside a voltage range wherea memory effect related to the ferroelectric behavior occurs. Thisvoltage range is shown in FIG. 2 between points A and B.

A method of manufacturing a ferroelectric device in accordance with theinvention, wherein a body is formed having a substrate, and the deviceis provided with a ferroelectric layer which is provided with aconnection conductor, an oxygen-free ferroelectric material being usedas the material for the ferroelectric layer, and said ferroelectriclayer being used to form an active electrical element, is characterizedin that a conductive layer is provided between the substrate and theferroelectric layer, which conductive layer is used to form a furtherconnection conductor of the ferroelectric layer, and the activeelectrical element is formed by forming a Schottky junction between theferroelectric layer and at least one of the connection conductors. Inthis manner a ferroelectric device having the above-discussed advantagesis obtained in a simple manner. In a preferred embodiment, the activeelectrical element is formed as a memory element. Preferably, the bodytakes the form of a semiconductor body and a, preferablymonocrystalline, semiconductor substrate is used as the substrate.Preferably, a field effect transistor with a source region, a drainregion and a gate electrode is formed in the semiconductor body, and thefurther connection conductor is provided on the source region or thedrain region of the field effect transistor and formed to a connectionconductor of the source region or the drain region.

In a favorable modification, the ferroelectric layer is formed byconverting part of a conductive layer to the ferroelectric material, oneof the connection conductors being formed by the remaining part of theconductive layer. As a result, the method is simplified and good contactbetween the metal and the oxygen-free ferroelectric material isobtained. A Cu layer can thus be partly converted to Cu₂S.

In a favorable modification, the Schottky junction is formed between thefurther connection conductor and the ferroelectric layer, which furtherconnection conductor also serves as the connection conductor of thesource region or the drain region, while an ohmic contact is formedbetween the connection conductor and the ferroelectric layer. Preferablya matrix of N×M memory elements is formed, where N and M are naturalnumbers, and each memory element is provided on both sides with anelectric connection. Preferably, each memory element is coupled to afield effect transistor formed in the device and associated with thememory element, which field effect transistor has a source region, adrain region and a gate electrode, and the device is provided with Nfirst conductor tracks and M second conductor tracks and with a groundconnection, and each memory element is connected via the connectionconductor to one of the N first conductor tracks and via the furtherconnection conductor to the source region or the drain region of theassociated field effect transistor whose drain region or source regionis coupled to the ground connection, and the gate electrode of the fieldeffect transistor is coupled to one of the M second conductor tracks.

These and other aspects of the invention are apparent from and will beelucidated with reference to the embodiment(s) described hereinafter.

In the drawings:

FIG. 1 is a diagrammatic cross-sectional view, at right angles to thethickness direction, of a ferroelectric device in accordance with theinvention,

FIG. 2 shows the current-voltage characteristic of the memory element ofthe device shown in FIG. 1, and

FIG. 3 diagrammatically shows the circuit of the device shown in FIG. 1,and

FIG. 4 shows the current-voltage characteristic of a modification of thememory element of the device shown in FIG. 1.

The Figures are not drawn to scale and some dimensions, such asdimensions in the thickness direction, are exaggerated for clarity. Inthe Figures like reference numerals refer to like areas or partswhenever possible.

FIG. 1 is a diagrammatic cross-sectional view, at right angles to thethickness direction, of a ferroelectric device 10 in accordance with theinvention. Said device 10 comprises a semiconductor body 11 having asemiconductor substrate 1. This semiconductor device further comprises aferroelectric layer 2 that is provided with a connection conductor 3 ona side facing away from the substrate 1. By means thereof, in this casea memory element 4 is formed, and the ferroelectric 2 comprises anoxygen-free ferroelectric material, here a chalcogenide.

In accordance with the invention, a conductive layer 5, preferably ametal layer 5, is situated between the semiconductor substrate 1 and theferroelectric layer 2, which conductive layer forms a further connectionconductor 5 of the ferroelectric layer 2, and the memory element 4 isobtained as a result of the fact that the ferroelectric layer 2 forms aSchottky junction with at least one of the connection conductors 3, 5.Such a device 10 can be formed very readily on a semiconductor substrate1 of silicon and still have a memory element 4 with excellentproperties, as will be explained in greater detail hereinafter. Animportant additional advantage of a device 10 in accordance with theinvention resides in that the manufacture thereof is highly compatiblewith the method customarily used to manufacture silicon devices. Thefinal process step of this method advantageously is an annealing step ina hydrogen-containing atmosphere. Such an annealing step is permissibleby virtue of the fact that the ferroelectric material used does notcontain oxygen. If the ferroelectric layer 2 were to contain oxygen,hydrogen would readily influence the stoichiometry of the ferroelectriclayer and hence the properties of said layer 2.

In this example, the device 10 also comprises a field effect transistor6 with a source region 7, a drain region 8 and a gate electrode 9, andthe further connection conductor 5 is situated on the source region orthe drain region, in this case the source region 7 of the transistor 6,and is also used as a connection conductor 5 of the source or drainregion 7, 8. In this example, viewed in projection, the memory element 4is situated within the source region or the drain region; in this casewithin the drain region 7. As a result, the device 10 is compact and canbe manufactured relatively readily. The presence of a field effecttransistor 6 is very advantageous if, as in this example, the device 10comprises a large number of memory elements 4 and each memory element 4is coupled to a field effect transistor as shown in FIG. 1. The device10 of this example thus forms a semiconductor memory with a large numberof memory elements 4, only one of which is shown in FIG. 1.

In the device 10 of this example, the Schottky junction is formedbetween the further connection conductor 5, here a platinum layer 5, andthe ferroelectric layer 2, here a Zn_(x)Cd_(1-x)S layer 2 having a Zncontent x of approximately 40 at. %. Via a thin, here 10 nm, Ti layer 15which serves as a barrier, the platinum 5 forms an ohmic contact withthe source region 7 of transistor 6. The connection conductor 3, herecontaining Ag, forms an ohmic contact with the ferroelectric layer 2.The thicknesses of the layers are 100 nm for the Zn_(x)Cd_(1-x)S layer2, 50 nm for the Pt layer 5 and 50 nm for the Ag layer 3. The lateraldimensions of the memory element 4 are, in this example, 1 μm×1 μm. Asuitable thickness for the Zn_(x)Cd_(1-x)S layer ranges between 25 nmand 500 nm. The doping concentration of the Zn_(x)Cd_(1-x)S layer 2 ischosen to be such that, on the one hand, it is high enough to enable anohmic contact to be established between the further connection conductor5 and the ferroelectric layer 2. On the other hand, the dopingconcentration should not be chosen to be so high that, during operation,the electric field in the ferroelectric layer 2 in the conducting stateis not high enough to switch off the memory element. The operation ofthe device 10 and, in particular, of the memory element 4 will beillustrated hereinafter with reference to FIG. 2.

FIG. 2 shows the current-voltage characteristic of the memory element 4of the device 10 of this example. At the origin, where the element 4 isin a state of low impedance, the current I rises with increasing voltageV in accordance with curve 21. At point A, where the voltage isapproximately +0.3 volt, the Zn_(x)Cd_(1-x)S layer 2 changes itspolarization and the element 4 switches to the high-impedance state. Afurther increase of the voltage V has no further effect. If the voltageV is reduced, the element V remains in the high-impedance state shown incurve 22 until the reverse switching voltage is reached at approximately−0.1 volt, indicated in the Figure by means of point B. From that momentthe element is (again) in the low-impedance state shown in curve 21. Afurther reduction of the voltage V to −0.4 volt has no further effect.The operation of the device 10 will normally be as follows: bring theelement 4 to the high-impedance state (“0”) by means of a short voltagepulse of +0.4 V, and to the low-impedance state (“1”) by means of ashort voltage pulse. Read the impedance of the element 4 at a lowvoltage V, such as a voltage V whose absolute value is smaller thanapproximately 0.1 V. As mentioned hereinabove, the device 10 comprises alarge number of memory elements 4, four of which are shown in FIG. 3.

FIG. 3 diagrammatically shows the circuit of the device 10 of thisexample. The device 10 comprises a number, for example 100, of firstconductor tracks 20, two of which are shown in FIG. 3, and a number,here also 100, of second conductor tracks 30, two of which are shown inFIG. 3. Each element 4 is connected via a connection conductor 3 to oneof the first conductor tracks 20 and via the further connectionconductor 5 to the source region 7 of the transistor 6. The drain region8 of the transistor 6 is connected to a ground connection 40, while thegate electrode 9 of the transistor 6 is connected to one of the secondconductor tracks 30. Thus, by applying a voltage to the gate electrode9, it is possible to select, via the transistor 6, the associatedelement 4 to adjust and/or read the impedance state.

The device 10 of this example is manufactured in the following manner bymeans of a method in accordance with the invention. There is startedfrom (see FIG. 1) a (100) silicon substrate 1 with a p-type doping in alow doping concentration. In said substrate there is formed, in a mannerwhich is known per se using customary processes, an N-MOS transistor 6having n-type source regions 7 and drain regions 8 surrounded by LOCOS(=LOCal Oxidation of Silicon) regions 12. Below these, on the side ofthe drain region 8, a part of an n-type region 13 is visible in thiscase, wherein a complementary P-MOS transistor, not shown, is formed.The gate electrode 9 is made of n-type polycrystalline silicon and issurrounded by isolating layers 14 containing silicon dioxide and/orsilicon nitride. A titanium layer 15 and a platinum layer 5 are appliedto the source region 7 and the drain region 8 by means of, for example,sputtering and form an ohmic contact with said regions. Locally, here atthe location of the source region 7, a Zn_(x)Cd_(1-x)S layer is providedthereon by means of sputtering. This technique is particularly suitablefor applying Zn_(x)Cd_(1-x)S of a stoichiometric composition, herecontaining 40 at. % Cd. At the location of the source region 7, thepatterned Zn_(x)CD_(1-x)S layer 2 is provided with a silver layer 3forming an ohmic contact with the Zn_(x)Cd_(1-x)S layer 2. Theconductive layers 3, 5 are separated from the first and the secondconductor tracks 20, 30 by means of a silicon dioxide layer, not shown,which is provided, for example, by means of CVD (=Chemical VaporDeposition). The same applies to the mutual insulation of the first andthe second conductor tracks 20, 30 which, as shown in FIG. 3, areconnected to each transistor 6 and each memory element 4. Themanufacturing process is completed by providing a silicon nitrideprotective layer, not shown, after which the device 10 is annealed bymeans of an annealing step in a hydrogen-containing atmosphere.

FIG. 4 shows the current-voltage characteristic of another modificationof the memory element 4 of the device 10 of the above-described example.In this example the memory element 4 comprises a ferroelectric layer 2containing Cu₂S as the oxygen-free ferroelectric material. Theconnection conductor 3 and the further connection conductor 5 contain,respectively, Cu and W in this example. A very important advantage ofthe device of this modification is that the elements that it containsare not toxic or at least not appreciably toxic. As a result, the burdenon the environment when the disposed of after its useful life as well asits permissibility in a manufacturing environment are substantiallyimproved. The image shown in FIG. 4 corresponds substantially to theinvention reference is made to the description pertinent to FIG. 2, thesafety of the manufacturing environment wherein a device in accordancewith the invention is manufactured is improved.

In the device shown in FIG. 4, the Cu₂S is formed preferably, like inthis modification, by partly converting a Cu layer Cu₂S. In this case,such a conversion is carried out by treating a Cu layer with an aqueoussolution of K2S_(x), where x>1. This has the advantage that,simultaneously with the oxygen-free ferroelectric layer, one of the twoconnection conductors is formed by, in this case, the remaining Culayer.

Other modifications of devices in accordance with the invention can beformed in a simple manner by choosing different oxygen-freeferroelectric materials for the ferroelectric layer 2, such as, inparticular, ferroelectric materials within the groups of compoundsreferred to as picnides, chalcogenides and halogenides, i.e. compoundsof one or more elements, of which one or more elements are from maingroup V, VI (with the exception of oxygen) and VII of the periodicsystem of elements, and mixed crystals thereof. Theoretically suitableoxygen-free ferroelectric materials are, for example, Al₅C₃N, Al₇C₃N₃,Sb₂S₃, Bi₂S₃, Bi₂S, Bi_(0,5)Sb_(1,5)S₂, TaInS₂, TaNbSe₂, TlSbSe₂,Bi_(0,5)Sb_(1,5)S₂, Ga_(x)Ge_(1-x)Te, where 0<x<1, SbSI, Cs₃BiCl₆, AMX₃,where A=Cs or Rb and M=Ca, Cr, Ti, V or Cu and X=F, Cl, Br or I, BaMF₄,where M=Mg, Mn, Fe, Co, Ni, Cu or Zn, SrAlF₅, K₂MF₆, where M=Mn, Cr, Tior Pd, A₃M₃F₁₉, where A=Sr, Ba or Pb and M=Al, Ti, V, Cr, Fe or Ga. Ofthese oxygen-free ferroelectric materials, Bi₂S₃ and SbSI have acomparatively low Curie temperature, which limits the practical use ofthese materials. The same applies to the compounds of thallium, due tothe toxicity of these compounds. The practical use of the compoundslisted above, starting from Cs₃BiCl₆, may be limited by too high anionic conductance, which may cause the data stored to be lost.

An example of a ferroelectric device according to the invention in whichthe active element is a diode-like device was realized with aferroelectric layer comprising ZnCdS between a platinum layer and asilver layer. Especially low (forward) voltages are obtained when theferroelectric semiconductor layer is thin an/or has a low coercive fieldand/or a Curie temperature which is close to the operating temperature.Typical values for the coercive field (kV/cm), the film thickness (nm)and switch voltage (V) are: 20 kV/cm, 30 nm and 0.06 V respectively, or30 kV/cm, 30 nm and 0.06 V respectively, or 40 kV/cm, 15 nm and 0.06 Vrespectively.

The invention is not limited to the above-described example and, withinthe scope of the invention, many variations and modifications arepossible to those skilled in the art. For example, devices having adifferent geometry and/or different dimensions can be manufactured. Itis also possible to employ different materials for, in particular, theconnection conductors, such as hafnium carbide or other binarymaterials.

What has been observed hereinabove regarding the device also applies tothe manufacture thereof. As well as the above-mentioned techniques forapplying the ferroelectric layer, also MBE (=Molecular Beam Epitaxy),(MO)VPE (=(Metal Organic) Vapor Phase Epitaxy or CVD (=Chemical VaporDeposition) or PLD (Pulsed Laser Deposition) can be used.

It is further noted that the device may comprise further active andpassive semiconductor elements such as diodes and/or transistors andresistors and/or capacitance's. This enables additional circuits to beadvantageously formed which are capable of fulfilling additionalfunctions.

Finally, it is noted again that a device in accordance with theinvention may also advantageously comprise a substrate other than amonocrystalline substrate. Also a substrate of a conductor, such as ametal, or of an insulator, such as glass, ceramic or synthetic resin canbe advantageously applied.

1. A method of manufacturing a ferroelectric device wherein a body isformed that comprises a substrate, and the device is provided with aferroelectric layer having a connection conductor on a side facing awayfrom the substrate, an oxygen-free ferroelectric material being selectedas the material for the ferroelectric layer which is used to form anactive electrical element, forming a field effect transistor in thesubstrate, the field effect transistor having a source region, a drainregion and a gate electrode, applying a barrier layer directly to thesource region or the drain region, applying a conductive layer directlyto the baffler layer, characterized in that the conductive layer isprovided between the substrate and the ferroelectric layer, and theconductive layer forms a further connection conductor of theferroelectric layer, and the active electrical element is obtained byforming a Schottky junction between the ferroelectric layer and at leastone of the connection conductors.
 2. A method according to claim 1,characterized in that the active electrical element is formed as amemory element.
 3. A method as claimed in claim 2, characterized in thatthe body is formed so as to be a semiconductor body, and a semiconductorsubstrate is selected as the substrate.
 4. A method as claimed in claim2, characterized in that the further connection conductor is formed soas to be a connection conductor of the source region or drain region. 5.A method as claimed in claim 2, characterized in that the Schottkyjunction is formed between the further connection conductor and theferroelectric layer, and an ohmic contact is formed between theconnection conductor and the ferroelectric layer as well as between thefurther connection conductor and the source or drain region of the fieldeffect transistor.
 6. A method as claimed in claim 2, characterized inthat the ferroelectric layer is formed by converting part of aconductive layer to the ferroelectric material, one of the connectionconductors being formed by the remaining part of the conductive layer.7. A method as claimed in claim 2, characterized in that a matrix of N×Mmemory elements is formed, where N and M are natural numbers and eachmemory element is provided on both sides with an electric connection. 8.A method as claimed in claim 2, characterized in that each memoryelement is coupled to a field effect transistor formed in the device andassociated with said memory element, which field effect transistorcomprises a source region, a drain region and a gate electrode, and thedevice is provided with N first conductor tracks, M second conductortracks and with a ground connection, and each memory element isconnected via the connection conductor to one of the N first conductortracks and via the further connection conductor to the source or drainregion of the associated field effect transistor, of which the otherdrain or source region is connected to the ground connection, while thegate electrode is connected to one of the M second conductor tracks. 9.A method of manufacturing a ferroelectric device wherein a body isformed tat comprises a substrate, and the device is provided with aferroelectric layer having a connection conductor on a side facing awayfrom the substrate, an oxygen-free ferroelectric material being selectedas the material for the ferroelectric layer which is used to form anactive electrical element, characterized in that a conductive layer isprovided between the substrate and the ferroelectric layer, and theconductive layer forms a further connection conductor of theferroelectric layer, and the active electrical element is obtained byforming a Schottky junction between the ferroelectric layer and at leastone of the connection conductors, and characterized in that theferroelectric layer is formed by converting part of a conductive layerto the ferroelectric material, one of the connection conductors beingformed by the remaining part of the conductive layer.
 10. A methodaccording to claim 9, characterized in that the active electricalelement is formed as a memory element.
 11. A method as claimed in claim10, characterized in that the body is formed so as to be a semiconductorbody, and a semiconductor substrate is selected as the substrate.
 12. Amethod as claimed in claim 10, characterized in that in thesemiconductor body there is formed a field effect transistor with asource region, a drain region and a gate electrode, and the furtherconnection conductor is provided on the source or drain region of thefield effect transistor and is formed so as to be a connection conductorof the source region or drain region.
 13. A method as claimed in claim12, characterized in that the Schottky junction is formed between thefurther connection conductor and the ferroelectric layer, and an ohmiccontact is formed between the connection conductor and the ferroelectriclayer as well as between the further connection conductor and the sourceor drain region of the field effect transistor.
 14. A method as claimedin claim 9, characterized in that a matrix of N×M memory elements isformed, where N and M are natural numbers and each memory element isprovided on both sides with an electric connection.
 15. A method asclaimed in claim 14, characterized in that each memory element iscoupled to a field effect transistor formed in the device and associatedwith said memory element which field effect transistor comprises asource region, a drain region and a gate electrode, and the device isprovided with N first conductor tracks, M second conductor tracks andwith a ground connection, and each memory clement is connected via theconnection conductor to one of the N first conductor tracks and via thefurther connection conductor to the source or drain region of theassociated field effect transistor, of which the other drain or sourceregion is connected to the ground connection, while the gate electrodeis connected to one of the M second conductor tracks.